This invention relates to integrated circuit packages; and more particularly, it relates to those packages which contain multiple very large scale integrated circuit die (VLSI die).
As used herein, an integrated circuit package is an electromechanical assembly which is configured to completely enclose an integrated circuit die, and which includes a plurality of electrical conductors that carry signals to and from the die. In a multichip integrated circuit package, several die are enclosed.
Typically, all of the die of a multipchip package are attached by solder or epoxy to a substrate in the package in an assembly area. These attachments are then visually inspected for faults and repaired. Bonding wires are then attached between the die and the conductors in the package; and they are then visually inspected for faults and repaired.
Then the package is moved from the assembly area to a test area. There the package is inserted into a tester which applies electrical signals to the conductors and analyzes the response signals to determine if the diie function electrically. If the package fails this test, it is moved back to the assembly area where each defective die is removed and replaced with a new die. Then the above described assembly procedure of visually inspecting the die, attaching bonding wires, etc. is repeated.
Packages which pass the electrical test are then moved to another assembly area in which the die are enclosed by a hermetically sealed lid. To form this seal, an epoxy, or a seam seal weld, or a laser weld is typically used. These packages are then moved to another test area where additional "burn-in" tests are performed before the packages are shipped to a customer. Burn-in tests typically include testing the electrical operation of the die under various extreme temperature or humidity conditions and testing the hermeticity of the lid seal.
Such an assembly procedure works well for packages in which the chips are relatively small--i.e., chips of the SSI, MSI or LSI type. However, it has been determined by the current inventors that the above assembly procedure has serious drawbacks when the chips in the package are of the VLSI type. One reason for this is that as the amount of circuitry on a chip increases, the number of input/output signals and bonding wires to the chip also increases; and to accommodate this increase, the bonding wires are placed closer together. Eventually, however, a point is reached at which defective bonding wires can no longer be repaired.
State of the art VLSI chips are being designed to contain between 100 and 300 bonding wires. These wires, for example, may be only 1.3 mils in diameter and only 5 mils apart. With so many small wires and such a small spacing, it is essentially not feasible to remove and replace a siingle bonding wire without damaging an adjacent wire. Also, bonding pads on the die have a similarly small size and spacing; so attempts to repair a defective wire often damages its small, fragile die bonding pad.
In the above described assembly procedure, the bonding wires are susceptible to being mechanically damaged from the time the package leaves the assembly area to the time the package lid is installed. Such damage can occur, for example, if the package is misinserted into the machine which electrically tests the die. Also, an object which is accidentally dropped into the package will damage the bonding wires. Even a worker who happens to sneeze on the package will damage or short the bonding wires together because they are so small, fragiile, and closely spaced.
VLSI die circuitry, as compared to SSI, MSI, or LSI die circuitry, is also much more susceptible to failure due to the presence of foreign particles or contaminants. This is because in order to increase the amount of circuitry on a die, the dimensions of the circuit components are scaled down; and as the circuit components become smaller in size, they become more sensitive to trace quantities of contaminants and the chemical reactions that they cause.
In the above described prior art assembly procedure, the die are susceptible to contamination from the time they leave the assembly area until a lid is hermetically attached to the package. Sources of this contamination include moisture or dust in the air, and trace amounts of acids or oils on the fingers of workers who handle the packages. Such contamination is very diffiicult to detect since a few parts per million of foreign particles will cause a circuit to fail only several months after the package is tested and shipped.
Accordingly, a primary object of the invention is to provide a novel multichip VLSI integrated circuit package which avoids the above described problems.